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I have been asked multiple times, how do you get a job in Finance as an FPGA engineer. Larger companies do hire interns, so your best bet if still in school is to contact some of the larger firms. When you do this, please read my other post on job …

Free Verilog simulators: Tachyon-da: http://www.tachyon-da.com/ offers an open source version of it’s simulator. This was a commercial simulator from the 90’s. They also offer a paid version with more support and features. Verilator: https://www.veripool.org/wiki/verilator Compiled simulator. Has some limitations in support, requires SystemC top level even if minimal for simulation. …

One mistake that I have seen regarding the homework assignments has been submitting your own work. To be clear, there is nothing wrong with using freely available IP if it helps you and shows off your abilities. For example, you could find a dual clock FIFO online and use it …

One of the ways major companies interview is to have a homework assignment for you to do. For trading firms, this is often a simple parser or data compression engine. For SpaceX, we came up with problems that would demonstrate clock domain crossing knowledge, packet forwarding and dropping cleanly. When …

I hate multicycle paths. They have their uses, but they are not simulatable. When you declare something: set_multicycle_path -setup -from a_in -to c_out 2 set_multicycle_path -hold -from a_in -to c_out 1 You are essentially telling the tool that it has one extra clock cycle (a total of 2 clocks) to …

One of the reasons I started blogging was to help the next generation of FPGA engineers get a jump on their career. One problem is how to land the first job.I get messages on linked in constantly asking for me for a position. I want to make a few recommendations …