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  • Machine Learning

    December 17, 2017
  • Hello World Revisited

    August 19, 2017
  • Vivado for HiDPI displays under linux

    August 16, 2017
  • Sorting – Pipelined Even-Odd

    August 15, 2017
  • Sorting – Completely parallel approach

    August 14, 2017
  • simple synchronization

    I want you to get this job part 1: simple synchronization

    July 7, 2017 2
  • Constraining the Synchronizer

    I want you to get this job part 2: Constraining the Synchronizer

    July 10, 2017 2
  • Passing data asynchronously

    I want you to get this job part 3: Passing data asynchronously

    July 11, 2017 2
  • Machine Learning

    December 17, 2017
  • FIFOs jobs

    I want you to get this job part 4: FIFOs

    July 15, 2017
  • admin: I've done my share of ASIC design, although long ago when 100Mhz was fast and 10...
  • admin: Sorry for taking so long to get back to you. I never (well almost never) use mul...
  • Dominique: Latch write en signal & data on the tx clock, resync the write en signal usi...
  • Kamath: Hi, The explanation here is right on point Thank you! However, I have a question...
  • admin: Hi VK, Check out post #3 regarding passing control buses. Short answer is to nev...
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  • simple synchronization

    I want you to get this job part 1: simple synchronization

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  • Passing data asynchronously

    I want you to get this job part 3: Passing data asynchronously

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    December 17, 2017
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  • Passing data asynchronously

    I want you to get this job part 3: Passing data asynchronously

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Latest Posts

  • Machine Learning

    December 17, 2017
  • Hello World Revisited

    August 19, 2017
  • Vivado for HiDPI displays under linux

    August 16, 2017
  • Sorting – Pipelined Even-Odd

    August 15, 2017
  • Sorting – Completely parallel approach

    August 14, 2017

Recent Comments

  • admin: I've done my share of ASIC design, although long ago when 100Mhz was fast and 10...
  • admin: Sorry for taking so long to get back to you. I never (well almost never) use mul...
  • Dominique: Latch write en signal & data on the tx clock, resync the write en signal usi...
  • Kamath: Hi, The explanation here is right on point Thank you! However, I have a question...
  • admin: Hi VK, Check out post #3 regarding passing control buses. Short answer is to nev...
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