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I’ve been looking into recent FPGA devices lately, both Ultrascale+ and Stratix 10. Now that you can fit a full tick to trade system in 1/3 of the mid sized devices, what is an HFT FPGA engineer to do? Work Smarter I have started investigating ML algorithms to accelerate decision …

Earlier I had posted my simple hello_world.sv example. Now I want to dive into a slightly more comprehensive example. This example also communicates to the testbench so I can begin to explore SystemC for testing. hello_world.sv 123456789101112131415161718192021222324252627282930313233`timescale 1 ns / 10 ps module hello_world   #   (    parameter …

Recently I purchased a laptop with a 15″ 4K display. While I like the real estate, my eyes are stating to hurt with the unscaled text in Vivado. For those who might be hitting the same condition, here is a solution: There is a program called “run_scaled”: sudo apt-get install …

One of my thoughts was to use an even-odd approach. This is typically done when using GPUs in a sequential fashion. I decided to do this pipelined. This approach turned out to be extremely inefficient in retrospect. In a future post, I’ll do a state machine based approach which will …

The first approach I attempted was a completely parallel approach as shown in the diagram below: The advantage to this approach, if it meets timing, is that it will produce a result every clock cycle, it’s compact, easy to understand, and uses a reasonable amount of logic. compare.sv 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197module compare …

I had Been trying to come up with a good problem to illustrate design trade offs when I came across this: Design a module that can sort four numbers. I’ve only done a few sorts in BASIC ages ago and more recently in OpenCL. Off the top of my head, …